The present invention relates to an output circuit constituted of insulated-gate field-effect transistors (hereinafter referred to as MISFETs), and more particularly to the output circuit in a semiconductor integrated circuit memory device.
Memory circuits and logic circuits generally have output circuits through which data read out from the memory circuit and data logically processed in the logic circuits are outputted. Such an output circuit may be a push-pull circuit in which two MISFETs are connected in series between two terminals of a power source and true and complementary input signals are supplied to the gates of these two MISFETs, respectively. An output is taken from the connecting point of these two MISFETs. Output circuits are generally required to drive their comparatively large load capacitances at a high speed. Consequently, the above-mentioned two MISFETs are large in size and, hence, their gate capacitances are also large. Therefore, in the case where immediately after delivering a logical data the output circuit delivers the opposite logical data, a substantial amount of time is required for inverting the gate potential of each of the above-mentioned MISFETs, resulting in low operating speed.